Superconducting pulse conserving logic and Josephson-SRAM
نویسندگان
چکیده
Superconducting digital Pulse-Conserving Logic (PCL) and Josephson SRAM (JSRAM) memory together enable scalable circuits with energy efficiency 100x beyond leading-node CMOS. Circuit designs support high throughput low latency when implemented in an advanced fabrication stack high-critical-current-density junctions of 1000$\mu$A/$\mu$m$^2$. Pulse-conserving logic produces one single-flux-quantum output for each input, includes a three-input, three-output gate producing logical or3, majority3 and3. Gate macros using dual-rail data encoding eliminate inversion produce efficient implementations all standard functions. A full adder 70 has carry-out 5ps corresponding to effective 12 levels at 30 GHz. JSRAM (Josephson SRAM) uses signals throughout active array achieve the same clock rate as logic. The unit cell eight junctions, signal propagation 1ps, footprint 2$\mu$m$^2$. Projected density is 4 MB/cm$^2$, computational pulse-conserving on par leading node CMOS accounting power densities rates.
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ژورنال
عنوان ژورنال: Applied Physics Letters
سال: 2023
ISSN: ['1520-8842', '0003-6951', '1077-3118']
DOI: https://doi.org/10.1063/5.0148235